Imagine designing your clock nets without using an assortment of zero delay buffers, fan-out buffers, termination resistors, delay lines and serpentine clock trace layouts! The ispClock™ Family of devices provide a standard clock net solution for a variety of clocking scenarios. ispClock devices can be programmed in-system to generate multiple clock frequencies, compensate each output for differences in clock trace lengths, precisely match trace impedance and drive clock nets with different signaling requirements – all while meeting stringent skew and jitter standards.