Part Search:
English
     
 
Linecard
Videos
Webcasts
 
 
 
 
FPGA
CPLD / SPLD
Memory
Power Manager
ispClock
Development Kits
Design Software
 
 
 

 

 
Products

 
 
Power Manager II
 

Introducing the Lattice ispPAC® Power Manager II family that integrates intelligent power sequencing and preci­sion fault monitoring technology with power supply voltage margining and trimming using digital closed loop technology – all in a single low-cost chip!

 
Click Here for more information
 
 
 
   
 
 

Copyright 2010, Origin Electronics Corp.
All Rights Reserved.
Reproduction in whole, or in part, without the written permission of the copyright holder is prohibited.